Sun Microsystems microSPARC-II overview
Sun Microsystems microSPARC-II Series 32-bit Microprocessors The microSPARC-II 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture v8 specification, it is ideally suited for low-cost uniprocessor applications.It is built with leading edg...
Manufactured bySun Microsystems
Part number or familymicroSPARC-II
Product group32-bit Microprocessors
What is Sun Microsystems microSPARC-II?
Sun Microsystems microSPARC-II Series 32-bit Microprocessors The microSPARC-II 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture v8 specification, it is ideally suited for low-cost uniprocessor applications.It is built with leading edg...
Product details
Manufactured bySun Microsystems
Product group32-bit Microprocessors
DescriptionSun Microsystems microSPARC-II Series 32-bit Microprocessors
OverviewThe microSPARC-II 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture v8 specification, it is ideally suited for low-cost uniprocessor applications.It is built with leading edge CMOS technology, featuring 0.5 micron geometries, 3-layer metal silicon process, with the core operating at low voltage for optimized power consumption.The microSPARC-II includes on chip: Integer Unit (IU), Floating Point Unit (FPU), large separate Instruction and Data Caches, v8 Reference MMU, Programmable DRAM controller, SBus Controller, Graphics Interface support, Internal and Boundary Scan through JTAG Interface, Power Management and Clock Generation capabilities.Taking advantage of optimized Compiler technology, impressive performance is achieved executing industry standard benchmarks. At 110 MHz, the estimated performance is 78 SPECint92 and 65 SPECfp92.
Key FeaturesSPARC High Performance RISC architecture Operating Frequency up to 110 MHz 8 window, 136-word register file 16 Kbyte Instruction cache, 8 Kbyte Data cache On-chip Memory Management Unit Optimized Integrated Floating-Point Unit Interface to S-Bus at 1/3, 1/4, 1/5 system clock Integrated DRAM controller On-chip Local Bus Controller (graphics) IEEE1149.1 (JTAG) boundary scan test bus 321-pin Ceramic PGA package
Key BenefitsCompatible with 9400 SPARC applications and development tools 135.5 KDhrystone @ 110 MHz Fast interrupt response, procedure calls and program execution Decouples processor operation from slow external memory Support for sophisticated operating systems with memory protection and virtual addressing 21.7 MFlops peak performance Connection to industry standard expansion bus Simple, low part count system design High-performance graphics with minimum part count Ease of manufacturing test Small footprint package with high thermal efficiency
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32-bit Microprocessors
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