NCR 810 overview
NCR 810 53C810 PCI-SCSI I/O Processor The 53C810 PCI-SCSI 110 Processor is based on the NCR 53C7XX 110 Processor architecture with a Peripheral Component Interc...
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Manufactured byNCR
Product groupPCI-SCSI I/O Processor
DescriptionNCR 810 53C810 PCI-SCSI I/O Processor
OverviewThe 53C810 PCI-SCSI 110 Processor is based on the NCR 53C7XX 110 Processor architecture with a Peripheral Component Interconnect (pCl) front end. The NCR 53C81 0 integrates a high-performance SCSI core and a PCI bus master DMA core with a SCSI SCRIPTS processor to accommodate the flexibility requirements of not only SCSI-1 and SCSI-2, but future SCSI standards as well. The 53C8-l0 solves the protocol overhead problems that have plagued previous intelligent and non-intelligent adapter designs.The 53C810 has been designed to "gluelessly" connect to the emerging industry standard PCI Bus. An entire SCSI solution, including a SCSI oscillator (40MHz), termination electronics, and an external connector (Figure 1-1), can be implemented on less than four square inches of space on the motherboard. In addition to the required PCI pins, the 53C810 provides two other signals useful in adapter plug-in card designs.The chip is fully supported by NCR SDMS (SCSI Device Management System) software based on the industry standard Common Access Method (CAM). The 53C810 is packaged in a 100-pin PQFP package, can operate the SCSI bus at 5 MB/s asynchronously or 10 MB/s synchronously, and burst data to the host at full PCI speeds.The 53C810 is designed to implement a multi-threaded I/O algorithm with a minimum of processor intervention. The 53C810 provides automatic relocation of SCRIPTS, and requires no dynamic alteration of SCRIPTS instructions at the start of an 110 operation. All of the SCRIPTS code may be placed in PROM. The 53C810 allows easy firmware upgrades and is supported by advanced SCRIPTS commands.
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NCR
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PCI-SCSI I/O Processor
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