Thales Computers VMPC7 Series overview
Thales Computers VMPC7 Series PowerEngine7 VMEbus CPU Boards | 6U VME PowerPC Single Board Computers. Single/Dual PowerPC 750FX/GX Single or Dual PowerPC 750FX/...
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Manufactured byThales Computers
Product groupVMEbus CPU Board
DescriptionThales Computers VMPC7 Series PowerEngine7 VMEbus CPU Boards | 6U VME PowerPC Single Board Computers. Single/Dual PowerPC 750FX/GX
Key FeaturesSingle or Dual PowerPC 750FX/GX Operating at up to 1 GHz Two PCI Mezzanine Card Sites 512 KB/1 MB Internal L2 Cache Clocked at Processor Frequency Low Power ALMA2e PCI/VME64 Bridge, Featuring 2eSST Capabilities Available in All 4 Environmental Ruggedization Levels Supports VxWorks, LynxOS, GreenHills Integrity, and Linux
OverviewThe PowerEngine7 features the latest PowerPC 750FX/GX microprocessor from IBM which delivers 700 MHz to 1 GHz performance for networking, storage, imaging, and other high-performance embedded applications. The PowerPC 750FX/GX fully complies with the PowerPC architecture. It is the first to combine IBM's most advanced process technologies onto one chip, reducing power consumption by up to 50 percent or increasing performance by up to 30 percent. Manufactured in IBM's advanced 0.13 micron process, the chip is the first to include copper interconnects, silicon-on-insulator (SOI) transistors, and low-k dielectric insulation technologies.The PowerPC 750FX and 750GX have respectively an internal L2 cache capacity of 512 KB and 1 MB. The cache is two-way set associative; each way contains 4096 blocks and each block consists of two 32-byte sectors. Array read and write operations execute in one processor cycle. Moreover, the L1 data cache path to the 60x bus interface unit (BIU) and the L2 cache reload path to the L1 data cache are each 256 bits, a fourfold improvement compared with previous 7xx processors. Additional buffers between the L1 data cache, L2 cache, and the BIU enable the processor to improve both latency and bandwidth by allowing two cache miss transactions to be active simultaneously on the 60x bus. The memory management unit (MMU) has eight data and eight instruction block address translation (BAT) registers to provide flexibility in defining larger blocks of memory for simpler management. Up to 4 GB of memory can be configured, eliminating the need for pagelevel translation in some embedded applications.
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