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EP1K50

Altera ACEX 1K EP1K50 Series Programmable Logic Devices

Altera ACEX 1K EP1K50 Series Programmable Logic Devices

Altera EP1K50 overview

Altera ACEX 1K EP1K50 Series Programmable Logic Devices | 50,000 Typical Gates, 199,000 Maximum System Gates, 2,880 Logic Elements (LEs), 10 EABs, 40,960 Total RAM Bits, 249 Maximum User I/O Pins. Programmable logic devices (PLDs), providing low cost system-on-a-programmable-chip (SOPC) integration ...

Manufactured byAltera
Part number or familyEP1K50

What is Altera EP1K50?

Altera ACEX 1K EP1K50 Series Programmable Logic Devices | 50,000 Typical Gates, 199,000 Maximum System Gates, 2,880 Logic Elements (LEs), 10 EABs, 40,960 Total RAM Bits, 249 Maximum User I/O Pins. Programmable logic devices (PLDs), providing low cost system-on-a-programmable-chip (SOPC) integration ...

Product details

Manufactured byAltera
Product groupProgrammable Logic Devices
DescriptionAltera ACEX 1K EP1K50 Series Programmable Logic Devices | 50,000 Typical Gates, 199,000 Maximum System Gates, 2,880 Logic Elements (LEs), 10 EABs, 40,960 Total RAM Bits, 249 Maximum User I/O Pins.
Key FeaturesProgrammable logic devices (PLDs), providing low cost system-on-a-programmable-chip (SOPC) integration in a single device– Enhanced embedded array for implementing megafunctions such as efficient memory and specialized logic functions– Dual-port capability with up to 16-bit width per embedded array block (EAB)– Logic array for general logic functions High density– 10,000 to 100,000 typical gates (see Table 1)– Up to 49,152 RAM bits (4,096 bits per EAB, all of which can be used without reducing logic capacity) Cost-efficient programmable architecture for high-volume applications– Cost-optimized process– Low cost solution for high-performance communications applications System-level features– MultiVoltTM I/O pins can drive or be driven by 2.5-V, 3.3-V, or 5.0-V devices– Low power consumption– Bidirectional I/O performance (setup time [tSU] and clock-tooutput delay [tCO]) up to 250 MHz– Fully compliant with the peripheral component interconnect Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2 for 3.3-V operation at 33 MHz or 66 MHz Extended temperature range

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Manufactured by Altera View Altera profile
Product group Programmable Logic Devices Explore Programmable Logic Devices
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