Alliance Memory AS7C1028 overview
Alliance Memory AS7C1028 Series 5V 256K X 4 CMOS SRAMs (Common I/O) The AS7C1028 is a 5V high-performance CMOS 1,048,576-bit Static Random-Access Memory (SRAM) ...
Product details
Manufactured byAlliance Memory
Product groupCMOS SRAM
DescriptionAlliance Memory AS7C1028 Series 5V 256K X 4 CMOS SRAMs (Common I/O)
OverviewThe AS7C1028 is a 5V high-performance CMOS 1,048,576-bit Static Random-Access Memory (SRAM) device organized as 262,144 words × 4 bits. It is designed for memory applications requiring fast data access at low voltage, including PentiumTM, PowerPCTM, and portable computing. Alliance’s advanced circuit design and process techniques permit 5.0V operation without sacrificing performance or operating margins.The device enters standby mode when CE is high. Equal address access and cycle times (tAA, tRC, tWC) of 12 ns with output enable access times (tOE) of 6 ns are ideal for high-performance applications. The chip enable (CE) input permits easy memory expansion with multiple-bank memory organizations.A write cycle is accomplished by asserting chip enable (CE) and write enable (WE) LOW. Data on the input pins I/O0-I/O7 is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).A read cycle is accomplished by asserting chip enable (CE) and output enable (OE) LOW, with write enable (WE) high. The chip drives I/O pins with the data word referenced by the input address. When chip enable or output enable is high, or write enable is low, output drivers stay in high-impedance mode.All chip inputs and outputs are TTL-compatible. Operation is from a single 5.0±0.5V supply. The AS7C1028 is packaged in high volume industry standard packages.
Key FeaturesIndustrial (-40°C to 85°C) temperature Organization: 262,144 words × 4 bits High speed- • 12 ns address access time- • 6 ns output enable access time Low power consumption via chip deselect One chip select plus one Output Enable pin Bidirectional data inputs and outputs TTL-compatible
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CMOS SRAM
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